Use the Fused Multiply Add 4 instruction set

Other “cpu_flags_x86” USE_EXPAND flag values

Use Flag Description
cpu_flags_x86_mmxext Use the Extended MMX instruction set (a subset of SSE) ([mmxext] or [sse] in cpuinfo)
cpu_flags_x86_sse3 Use the SSE3 instruction set ([pni] in cpuinfo, NOT ssse3)
cpu_flags_x86_sse4_2 Enable SSE4.2 instruction support
cpu_flags_x86_xop Enable the XOP instruction set
cpu_flags_x86_sha Use the SHA-NI instruction set
cpu_flags_x86_avx512vl Use AVX-512 vector-length instructions
cpu_flags_x86_fma4 Use the Fused Multiply Add 4 instruction set
cpu_flags_x86_avx512f Adds support for AVX-512 Foundation instructions
cpu_flags_x86_fma3 Use the Fused Multiply Add 3 instruction set ([fma] in cpuinfo)
cpu_flags_x86_pclmul Use Carry-less Multiplication instructions ([pclmulqdq] in cpuinfo)
cpu_flags_x86_sse4a Enable SSE4a instruction support
cpu_flags_x86_ssse3 Use the SSSE3 instruction set (NOT sse3/pni)
cpu_flags_x86_avx512dq Use AVX-512 double- and quad-word instructions
cpu_flags_x86_popcnt Enable popcnt instruction support ([abm] or [popcnt] in cpuinfo)
cpu_flags_x86_f16c Adds support for F16C instruction set for converting between half-precision and single-precision floats
cpu_flags_x86_avx2 Adds support for Advanced Vector Extensions 2 instructions
cpu_flags_x86_3dnow Use the 3DNow! instruction set
cpu_flags_x86_padlock Use VIA padlock instructions ([phe] in cpuinfo)
cpu_flags_x86_sse4_1 Enable SSE4.1 instruction support
cpu_flags_x86_mmx Use the MMX instruction set
cpu_flags_x86_aes Enable support for Intel's AES instruction set (AES-NI)
cpu_flags_x86_avx Adds support for Advanced Vector Extensions instructions
cpu_flags_x86_sse Use the SSE instruction set
cpu_flags_x86_3dnowext Use the Enhanced 3DNow! instruction set
cpu_flags_x86_rdrand Use the RDRAND instruction for generating random numbers
cpu_flags_x86_sse2 Use the SSE2 instruction set

All packages providing a “cpu_flags_x86_fma4” USE flag (12)